The present invention relates to magnetic domain wall shift register memory devices, and more specifically, to a magnetic domain wall shift register memory device utilizing a magnetic tunnel junction (MTJ) that is self-aligned to the nanowire that comprises the magnetic domain wall shift register.
Fabrication of a magnetic domain wall shift register memory device requires aligning one or multiple MTJs to one or multiple magnetic nanowires. In the fabrication process, accurate alignment between the MTJ and the magnetic nanowire is crucial to obtaining a properly functioning device.
Existing racetrack memory device designs utilize an integrated MTJ, where the nanowire acts as the free magnetic layer, and the reference magnetic layer is patterned in a separate lithography step from the nanowire. This makes alignment and processing difficult, and often necessitates an MTJ that is narrower than the nanowire. Rounding also occurs due to optical effects of having a small hole versus a line in the lithography masks. As such, much process optimization, including trial-and-error, is necessary during fabrication to properly align the MTJ on the nanowire.